IP Micro Architect, Silicon
نظرة عامة على الوظيفة
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تاريخ الإعلانفبراير 14, 2026
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الموقع
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تاريخ إنتهاء الصلاحية--
المسمى الوظيفي
2026-02-10T07:59:34.570Z
129180877803397830
Minimum qualifications:
- Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
- 10 years of experience with design and multi power domains with clocking.
- Experience in verilog or system verilog language.
Preferred qualifications:
- Master’s degree or PhD in Electrical Engineering, Computer Engineering or Computer Science.
- Experience with ASIC design methodologies for front quality checks including Lint, CDC/RDC, Synthesis, DFT ATPG/Memory BIST, UPF and Low Power Optimization/Estimation.
- Experience in STA closure, DV test-plan review and coverage analysis of the sub-system and chip level verification.
- Experience with chip design flow and understanding of cross domain involving DV/DFT/Physical Design/Software.
- Knowledge of process cores, interconnects, debug and trace, security, interrupts, clocks/reset, power/voltage domains.
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google’s direct-to-consumer products. You’ll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
Google’s mission is to organize the world’s information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people’s lives better through technology.
المسؤوليات
- Use simulation/emulation/power analysis tools and techniques to ensure power and performance meet defined specifications.
- Develop, implement, and maintain design blocks or components/part of a hardware product, and integrate design blocks or components/parts to create product subsystems.
- Collaborate with cross-functional teams to debug failures (e.g., boards, software, manufacturing, design, thermal issues).
Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also Google’s EEO Policy and EEO is the Law. If you have a disability or special need that requires accommodation, please let us know by completing our Accommodations for Applicants form.
